The field of the invention relates to computers and data processing. Specifically, this invention relates to multiprocessing where a plurality of processors share a common memory and whose operations are in some manner interrelated.
The description of the prior art includes several patents which employ multiple processing units. The most pertinent invention in the prior art of which we are aware is described by U.S. Pat. No. 3,348,210, Ochsner. Ochsner described a computing system in which each processing unit executes programs from a common non-program-alterable memory. This is also true for its task assignment program. Because of this memory sharing, instruction reference by a processor excludes any referency by another until the reference is completed. Hence, it is difficult to match computer memory speed to processor speed economically. Deviation from the optimum number of processors will either cause memory references to backlog, or allow the memory to operate at less than maximum speed. Therefore, no great flexibility in system configuration is permitted.
Another invention employing multiple processing units is that described in U.S. Pat. No. 3,349,375, Seeber et al. In this invention, the memory is split into several modules, each available to any processor desiring to receive data from or execute instructions from a selected one. The Seeber invention is somewhat analogous to the Ochsner invention, but includes the additional flexibility of several memories, any one of which may be available to a processing unit on demand. A third patent, U.S. Pat. No. 3,350,689, Underhill et al, discloses essentially autonomous computers linked together in a synchronized fashion so as to permit data transfers between any pair of the several computers involved.
This entire field is discussed in great detail in Parallelism in Hardware and Software: Real and Apparent Concurrency, by Harold Lorin, cpyrt. 1972 Prentice-Hall.